This course attacks the complexity of programming/designing fine-grained parallel architectures such as FPGAs and GPUs through the power of the polyhedral model, a mathematical formalism to (i) represent compute- and data-intensive loops and/or equations, (ii) analyze them to determine sequential or parallel schedules, and storage mappings, (iii) transform them using these schedules and storage mappings, and (iv) derive/generate sequential or parallel "codes."

The Fall 2015 edition of this class will focus on GPUs (Graphics Processing Units) and accelerators like the Intel Xeon Phi, Knights Brigge/Landing as our target architecture. We will also explore custom acclerators using Verilog on FPGA targets. For many assignments We will use the "fruit" machines in the HPC Lab (CS 325) and write, and derive programs in CUDA.

The polyhedral model is now used for automatic parallelization in a number production compilers such as gcc, llvm/Polly, IBM's XL series, and Reservoir Lab's R-Stream. There are active research groups on the polyhedral model at MIT (Amarasinghe), Illinois (Padua), Utah (Hall), Ohio State (Sayappan), Louisisana State (Ramanujam), IBM Research (Renganarayana, O'Keefe, etc.), Leiden (Kienhuis, Deprettere), Indian Institute of Science, Bangalore (Bondhugula) and many groups in France: IRISA, Rennes (Derrien, Quinton), ENS Lyon (Feautrier, Darte, Alias), Bordeaux (Barthou), INRIA (Cohen, Bastoul, Clauss, etc.)

Sanjay Rajopadhye is one of the inventors of the polyhedral model, and has been active in the field since his Ph.D. dissertation (Utah, 1986). At CSU, we take a unique view of the polyhedral model that combines the analytic quantitative power of the model with the expressivity and clean semantics of equational programming.