CS470: Computer Architecture
[Spring 2017]
CS470: Computer Architecture |
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| {Home} | {Schedule} | {Resources} |
| Last updated on Monday, January 16, 2017 12:30 AM. Page Under Construction!! | |||
| Instructor | Graduate Teaching Assistants | ||
| Yashwant K. Malaiya Office: Room 356, CS Building Office Hours: W 4:10-5:00 PM, F 10:10-11:00AM E-mail: malaiya {aT} cs.colostate.edu (with the obvious change) Tel: 970.491.7031 |
Athith Amarnath E-mail: athith.amarnath {aT} colostate.edu Office Hours in CSB 120: Mondays 4:00-6:00PM, Fridays 11:00AM-1:00PM | ||
| Key to Notation Readings will be from the Computer Organization & Design: The Hardware/Software Interface book by David A. Patterson & John L. Hennessy 5th edition. Morgan Kaufmann Publishers, Inc. [COD] |
| Week | Date | Topics | Reading` | Quizzes | Assignments |
| 1 | Jan 16-20 | Introduction, Combinational Logic, Boolean Algebra |
Appendix B.1-B.6 | ||
| 2 | Jan 23-27 | PLAs, Logism | Appendix B.7-B.11 | Q1 Combinational Logic | H1 Combinational Logic, Logisim |
| 3 | Jan 30 - Feb 03 | Storage Elements, Sequential Analysis, Sequential Design |
Appendix B.7-B.11 | Q2 Sequential Circuits | |
| 4 | Feb 06-10 | Instruction Set Architecture, Programming Model, MARS Simulator | Chapter 2.1-2.7, Appendix A | Q3 MIPS | H2 Sequential Circuits on Logisim |
| 5 | Feb 13-17 | MIPS Procedures, MIPS Translation |
Chapter 1 & 3 | Q4 MIPS | |
| 6 | Feb 20-24 | Performance, Moore's Law, Arithmetic: ALU | Chapter 2.14-2.20 | Q5 Performance | P1 MIPS |
| 7 | Feb 27 - Mar 03 | Multiply, Divide, Floating Point |
Chapter 3 | Q6 Arithmatic | News Search, Arithmetic Exercise |
| 8 | Mar 06-10 | Simple Processor Design, Review, Midterm (example) | P2 MIPS | ||
| March 10: Mid term March 11-19: Spring Break March 20: Last day for drop with W |
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| 9 | Mar 20-24 | Processor Datapath & Control |
Chapter 4.1-4.4 | Q7 Datapath | Project proposal |
| 10 | Mar 27-31 Apr 01 | Pipeline Intro, Hazards/Stalling/Forwarding | Chapter 4.5-4.9 | Q8 Pipelining | |
| 11 | Apr 03-07 | Multiple issue, Memory Hierarchy, Cache |
Chapter 4.10, Chapter 5 | Q9 | HW 41 |
| 12 | Apr 10-14 | Cache, Performance | Q10 | Progress Report | |
| 13 | Apr 17-21 | Virtual Memory, Virtual Machines |
Q11 | HW4 Pipelining/Memory | |
| 14 | Apr 24-28 | Parallel Processors A, Parallel B | Q12 | ||
| 15 | May 01-05 | Presentations, Final Review |
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| May 8 2017 7:30am - 9:30am: Final | |||||
| Department of Computer Science, Colorado State University, Fort Collins, CO 80523 USA © 2017 Colorado State University |