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definitions of the LC3 instruction set architecture (ISA) (do not modify) More...
Go to the source code of this file.
Data Structures | |
| struct | inst_format |
| struct | LC3_inst |
Macros | |
| #define | LC3_VAR extern |
| #define | LC3_WORD unsigned short |
| #define | LC3_MEM_SIZE 65536 |
| #define | LC3_NUM_REGS 8 |
| #define | RETURN_ADDR_REG 7 |
Typedefs | |
| typedef enum opcode | opcode_t |
| typedef enum operand | operand_t |
| typedef enum operands | operands_t |
| typedef struct inst_format | inst_format_t |
| typedef struct LC3_inst | LC3_inst_t |
Enumerations | |
| enum | opcode { OP_INVALID = -1, OP_BR, OP_ADD, OP_LD, OP_ST, OP_JSR_JSRR, OP_AND, OP_LDR, OP_STR, OP_RTI, OP_NOT, OP_LDI, OP_STI, OP_JMP_RET, OP_RESERVED, OP_LEA, OP_TRAP, OP_ORIG, OP_END, OP_BLKW, OP_FILL, OP_STRINGZ, OP_GETC, OP_OUT, OP_PUTS, OP_IN, OP_PUTSP, OP_HALT, OP_GETS, OP_ZERO, OP_COPY, OP_NEG, NUM_OPCODES } |
| enum | operand { FMT_R1 = 0x001, FMT_R2 = 0x002, FMT_R3 = 0x004, FMT_CC = 0x008, FMT_IMM5 = 0x010, FMT_IMM6 = 0x020, FMT_VEC8 = 0x040, FMT_ASC8 = 0x080, FMT_IMM9 = 0x100, FMT_IMM11 = 0x200, FMT_IMM16 = 0x400, FMT_STR = 0x800 } |
| enum | operands { FMT_ = 0, FMT_RRR = (FMT_R1 | FMT_R2 | FMT_R3), FMT_RRI5 = (FMT_R1 | FMT_R2 | FMT_IMM5), FMT_CL = (FMT_CC | FMT_IMM9), FMT_R = FMT_R2, FMT_I11 = FMT_IMM11, FMT_RL = (FMT_R1 | FMT_IMM9), FMT_RRI6 = (FMT_R1 | FMT_R2 | FMT_IMM6), FMT_RR = (FMT_R1 | FMT_R2), FMT_V = FMT_VEC8, FMT_A = FMT_ASC8, FMT_16 = FMT_IMM16 } |
Functions | |
| char * | strdup (const char *) |
| LC3_inst_t * | lc3_get_inst_info (opcode_t opcode) |
| int | lc3_read_LC3_word (FILE *f) |
| void | lc3_write_LC3_word (FILE *f, int val) |
Variables | |
| LC3_VAR int | inHex |
| LC3_VAR sym_table_t * | lc3_sym_tab |
This defines the details of the LC3 instruction set architecture (ISA). It is a separate file so that it can be shared by both an assembler and a simulator.
| #define LC3_MEM_SIZE 65536 |
The LC3 defines a memory accessed by a 16 bit address
| #define LC3_NUM_REGS 8 |
The LC3 contains 8 general purpose register, named R0..R7
| #define LC3_VAR extern |
A handy way of declaring global variables in a header file
| #define LC3_WORD unsigned short |
LC3 words are 16 bits
| #define RETURN_ADDR_REG 7 |
Return address stored in R7
| typedef struct inst_format inst_format_t |
This structure stores the information for one form of an instruction. Several instructions have multiple forms, but most have only one.
| typedef struct LC3_inst LC3_inst_t |
This structure stores the information about a single instruction. See the usage in lc3.c where the information for each LC3 instruction is defined.
The LC3 opcodes and pseudo-ops. The codes of OP_BR .. OP_TRAP corresponds exactly to the numeric values assigned to the 16 LC3 instructions. The codes assigned to the pseudo-ops is arbitrary. PCi is the incremented PC
A bit field used to define the types of operands an individual LC3 instruction may have. Each value represents a different bit in the final result. When you see C code like this, it is likely that an integer value is used to represent an "array" of up to 32 boolean values. Each value is accessed with a mask that extracts the bit of interest. See the inst_format_t below.
| typedef enum operands operands_t |
Define a combinatin of operands an opcode may have. For example, the the BR, LD, LDI, ST and STI instructions all have two parameters. The first is a register, the second is a nine bit offset. This form stores multiple boolean values in a single integer values by using individual bits to encode information.
| enum opcode |
The LC3 opcodes and pseudo-ops. The codes of OP_BR .. OP_TRAP corresponds exactly to the numeric values assigned to the 16 LC3 instructions. The codes assigned to the pseudo-ops is arbitrary. PCi is the incremented PC
| enum operand |
A bit field used to define the types of operands an individual LC3 instruction may have. Each value represents a different bit in the final result. When you see C code like this, it is likely that an integer value is used to represent an "array" of up to 32 boolean values. Each value is accessed with a mask that extracts the bit of interest. See the inst_format_t below.
| enum operands |
Define a combinatin of operands an opcode may have. For example, the the BR, LD, LDI, ST and STI instructions all have two parameters. The first is a register, the second is a nine bit offset. This form stores multiple boolean values in a single integer values by using individual bits to encode information.
| LC3_inst_t* lc3_get_inst_info | ( | opcode_t | opcode | ) |
Get the information for an instruction, given its opcode This is simply an access into an array of values initialized with the information for each of the LC3's sixteen instructions and additional pseudo-ops.
| opcode | - the opcode of the instruction/pseudo-op of interest |
| int lc3_read_LC3_word | ( | FILE * | f | ) |
Read an LC3 word (16 bits) from a file and return the value
| f | - the object file |
| void lc3_write_LC3_word | ( | FILE * | f, |
| int | val | ||
| ) |
Write an LC3 word to a file in binary or hex
| f | - the file to write to |
| val | - the value to write |
| char* strdup | ( | const char * | ) |
prototype for handy function to duplicate a string
| LC3_VAR int inHex |
Global flag defining whether using .obj file or .hex file
| LC3_VAR sym_table_t* lc3_sym_tab |
Global variable holding symbol table
1.8.6