These are results from previous versions of the compiler, mostly for internal purposes.
The comparisons were made by compiling SA-C routines with the May 13, 2001 version of the SA-C compiler and executing them on an Annapolis Microsystems StarFire with an Xilinx XV-1000 FPGA. The compiler did 8-fold vertical stripmining, among other optimizations. Since the magnitudes of Prewitt edges can be computed using the Intel Image Processing Library (IPL), we used the IPL as a basis of comparison. (Note that IPL routines are hand-optimized assembly code designed to take advantage of MMX technology.) The IPL Prewitt was executed under Windows2000 on an 800MHz Pentium III . The test images were 8-bit 512x512 images.
|
Seconds (800MHz P3)
|
Seconds (AMS Starfire)
|
Cycles (MClocks)
|
Logic Blocks
|
Frequency |
|
0.16036
|
0.007284490
|
262,686
|
50%
|
35.5 MHz |
Is it bragging to point out that SA-C + FPGA beats hand-optimized Pentium assembly code by a factor of over twenty?