This is the tentative schedule of Mélange group for the Fall 2021 semester.
Meeting time & Place : Tuesdays 9:30 AM - 10:30 AM (MST/MDT) in ISTeC Room (CSB 305), and via Webex.
WEEK | DATE | TOPIC | PRESENTER |
---|---|---|---|
1 | 8/24/2021 | First meeting | |
2 | 8/31/2021 | Tracking schema statistics in Leela with GPU‐efficient mathematics | Steve Kommrusch |
3 | 9/07/2021 | Increasing FPGA Accelerators Memory Bandwidth with a Burst-Friendly Memory Layout | Corentin Ferry |
4 | 9/14/2021 | There's plenty of room at the Top: What will drive computer performance after Moore's law? | Sanjay Rajopadhye |
5 | 9/21/2021 | From micro-OPs to abstract resources: constructing a simpler CPU performance model through microbenchmarking | Nicolas Derumigny |
6 | 9/28/2021 | Improved Parallel Cache-Oblivious Algorithms for Dynamic Programming and Linear Algebra | Malek Mechergui |
7 | 10/05/2021 | Compilation of Sparse Array Programming Models | Nana Yin |
8 | 10/12/2021 | Efficient Execution of Dynamic Programming Algorithms on Apache Spark | Chiranjeb Mondal |
9 | 10/19/2021 | Thesis work: Extending Simplifying Reductions | Louis Narmour |
10 | 10/26/2021 | Revealing Parallel Scans and Reductions in Recurrences through Function Reconstruction | Vidit Save |
11 | 11/02/2021 | Reverse Engineering for Reduction Parallelization via Semiring Polynomials | Shenmou Liu |
12 | 11/09/2021 | TBD | Alexandre Dubois |
13 | 11/16/2021 | TBD | Steve Kommrusch |
14 | 11/30/2021 | n/a | |
15 | 12/07/2021 | Resource-Aware Throughput Optimization for High-Level Synthesis | Nicolas Derumigny |