CALL FOR PAPERS AND PARTICIPATION Theme: DEFECT BASED TESTING OF DEEP SUBMICRON VLSI How can we best cope with the test problems imposed by today's and future ICs? The 2001 International Workshop on Current and Defect Based Testing (DBT2001) will address these themes and aims to suggest possible solutions. It provides a forum to address the advances and research issues related to Current and Defect Based Testing and related testing methods in an informal setting. The theme of this year's workshop is "Defect Based Testing of Deep Submicron VLSI" has been selected to generate active discussions on challenges that have to be met to ensure a high coverage of faults in Submicron ICs. The topics include all aspects of Current Testing, Defect Coverage, Test Vector Selection, Built-in Current Sensing and Current Sensors. Representiative topics include, but are not limited to the following: IDDQ and IDDT Testing Design for IDDQ Testing Submicron Test Challenges Fault Coverage - What is Sufficient Economics of IDDQ Testing Technology Trends and Testing IDDQ Test Generation Tools Mixed Current/Voltage Testing ATE Issues On and Off Chip Current Sensors Defects Coverage & Metrics Fault Location & Diagnosis IDDQ Limit Setting IDD Testing of Analog/Mixed Circuit Reliability Fault Detection Limitations of IDDQ Testing Reliability Vs. Yield Bridging Faults Modeling, Tools etc. Burn In Minimization Defect based Testing To present at the workshop, submit a postscript or Acrobat (PDF) version of an extended abstract (about 1000 words), as an E-mail attachment, to the program chair by Dec 15, 2000. Accepted papers can be up to 6 pages long. Each submission should include full name and address of each author, affiliation, telephone number, FAX and e-mail address. The presentee's name and address should also be indicated. Camera ready papers for publication in proceedings will be due on Feb. 16, 2001. Reports or presentations on the state of technology, innovative design ideas and industrial practices are welcome. Proposals for panel discussions are also invited. AUTHOR'S SCHEDULE: Submission of Extended Abstract: Jan 6, 2000 Notification of Acceptance: Jan 19, 2000 Camera Ready Paper: Feb 16, 2000 For Technical Program Submissions: Prof. Duncan M. Walker, Program Chair Dept. of Computer Science Texas A&M University College Station, TX 77843-3112, USA Tel: (979) 862-4387, Fax: (979) 847-8578, walker@cs.tamu.edu For General Information Dr. Sankaran M. Menon, General Chair Intel Corporation 1501 S. Mopac Expwy, MS AN1-4A Austin, TX 78746, USA (512) 314-0573, -0523 (FAX) sankaran.menon@intel.com DBT 2000 web site: http://www.cs.colostate.edu/~malaiya/dbt2000.html Please visit the VTS2001 web-site for Advance Registration and Hotel Information: IEEE VLSI TEST SYMPOSIUM (VTS 2001) WWW Site: http://www.computer.org/tab/tttc/meetings/vts/home.html

General Chair Sankaran M. Menon, General Chair Intel Corporation 1501 S. Mopac Expwy, MS AN1-4A Austin, TX 78746, USA (512) 314-0573, -0523 (FAX) sankaran.menon@intel.com Program Chair Duncan M. Walker, Program Chair Dept. of Computer Science Texas A&M University College Station, TX 77843-3112, USA Tel: (979) 862-4387, Fax: (979) 847-8578, walker@cs.tamu.edu Finance Chair Sri Jandhyala Texas Instruments srij@ti.com Publicity Chair Hans Manhaeve Q-Star Test nv hans.manhaeve@qstar.be Local Arrangements Chair Kwang-Ting(Tim) Cheng University of California, Santa Barbara timcheng@ece.ucsb.edu Advisor Charles Hawkins University of New Mexico Steering Committee Yashwant K. Malaiya (Chair), Colorado State University Anura P. Jayasumana (Vice-Chair), Colorado State University Joan Figueras, UPC, Barcelona Kozo Kinoshita, Osaka University Rochit Rajsuman, Advantest Program Committee Robert Aitken, Hewlett Packard, USA Waleed Al-Assadi, IBM, USA Sreejit Chakravarty, Intel, USA Anne Gattiker, IBM, USA Ali Keshavarzi, Intel, USA Kozo Kinoshita, Osaka Univ, Japan Bram Kruseman, Philips,Netherlands Peter Maxwell, Agilent Tech, USA Ed McCluskey, Stanford Univ, USA Andrew Richardson, Lancaster Univ, UK Marly Roncken, Intel, USA Rob Roy, Mobilian, USA Manoj Sachdev, Univ of Waterloo, Canada Jaume Segura, UIB, Balears, Spain Adit Singh, Auburn Univ, USA Jerry Soden, Sandia Nat Labs, USA Claude Thibeault, Ecole de Tech Sup, Canada Victor Zieren, Philips Res., Netherlands